Speaker
Description
Instruction Set Architecture (ISA) forms the foundational blueprint of all computing systems. Historically, ISAs have been tightly coupled with specific manufacturers, leading to inconsistencies across platforms and requiring the redevelopment of software infrastructures for each architecture. Although some level of standardization has been achieved through dominant architectures such as x86 (led by Intel and AMD) and ARM, these remain proprietary and closed systems. This restricts openness, transparency, and collaborative progress—core principles of the open-source ecosystem.
In contrast, RISC-V has emerged as a transformative, open, and modular ISA that empowers developers, researchers, and hardware designers by eliminating licensing costs and vendor lock-in. This presentation explores the performance and compatibility of RISC-V when paired with Ubuntu, the flagship open-source operating system. Key metrics such as Boot Times, CPU Utilization across different RISC-V cores, Kernel Compilation Times, and Throughput in system-level tasks will be examined, along with comparisons to other mainstream architectures.
The session will highlight the performance and power efficiency of Ubuntu running on RISC-V hardware over other mainstream hardware, showcasing its viability in real-world applications. From ultra-low-power IoT devices to scalable edge computing platforms, Ubuntu on RISC-V demonstrates significant potential for enabling innovation across diverse industries.
This talk will trace the evolution of ISA development, examine Ubuntu's expanding support for the RISC-V ecosystem, and discuss the practical implications for developers and organizations adopting this architecture—supported by comparative benchmark data and real-world performance metrics.
What audience can learn
From this session, the audience will learn about concept of Instruction Set Architectures and how RISC-V is different among others. Similarly they would get the overview of how RISC-V hardware, paired with Ubuntu, offers a powerful and open alternative to traditional proprietary architectures. They’ll gain insights into performance benchmarks, practical development workflows, and the growing ecosystem supporting RISC-V. This knowledge will help them understand the real-world potential of adopting RISC-V in projects ranging from IoT to scalable computing systems.
Summary
This session explores the transformative potential of RISC-V as an open, modular ISA, highlighting its performance and compatibility with Ubuntu. And explores RISC-V's advantages over proprietary architectures, supported by benchmark data on boot times, CPU utilization, and system throughput.
Things to know or prepare for this session
Overall knowledge about working of basic 8 bit computer is must.
Biography
I’m Nirjal Bhurtel, a Computer Engineering student at Kathmandu University and an Embedded Software Engineer at Yatri Motorcycles. Over the past two years, I’ve developed a strong passion for computer architecture. This interest led me to design my own computer based on a Reduced Instruction Set Computing (RISC) architecture, which I implemented on an FPGA using Verilog. The experience of building a system from the ground up has deepened my understanding of low-level hardware-software integration and further fueled my love for embedded systems and architectural design.
| Difficulty level | Intermediate |
|---|